AOR AR-ONE Specifications download pdf (Page 33)

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Specifications subject to change without notice.

The 95S-1(A) receiver is a 0.005 to 2000 MHz high-performance modular receiver employing a direct

conversion (homodyne) architecture. The receiver frequency scheme uses only one mix: a single synthesizer

local oscillator tuned to the desired signal frequency converts a signal directly to baseband, or the zero-frequency

"IF signal." Baseband signal waveforms are filtered and demodulated under the control of digital signal

processor (DSP) technologies developed and patented by Rockwell Collins. The advantages realized with a

homodyne, or direct conversion receiver (DCR) architecture are simplicity and performance. The DCR provides

wide frequency coverage without spurious-generating multiple mixes, and allows receiver selectivity to be

obtained using audio low-pass filters rather than the more complex RF/IF filtering required with heterodyne

receivers. Additionally, a majority of receiver gain can be applied at baseband rather than in front end RF stages.

Because a DCR has no "IF," there is no receiver performance degradation due to "IF" or image rejection.

Similarly, there are no "crossover" spurious responses because there is only a single local oscillator.

The 95S-1(A) incorporates a high-dynamic range Rockwell Gallium Arsenide mixer, preceded by internally

tracking preselectors over the 20 to 2000 MHz portion of the tuning range. The receiver utilizes a hybrid

architecture for frequencies within the 0.005 to 30 MHz tuning range, with parametric upconversion to a 51.2

MHz IF frequency.

An MFD synthesizer with progressive modulo-2 division provides quadrature low-noise, spurious-free injection

signals to the HF and VHF/UHF mixers. The quadrature channels are identically low-pass filtered, amplified

(with AGC), and digitized by a sigma-delta ADC.

The DSP section utilizes twin 16-bit microprocessors to perform all Finite Impulse Response (FIR) filtering,

demodulation, automatic gain control (AGC), and ancillary functions for the receiver. An additional

microprocessor provides communications and command execution control. A complement of standard DSP

functions is contained within a flash memory integrated circuit, allowing field upgrades and customization.

Seventy-four filter bandwidths are standard, and five optional user-defined filter coefficient sets can be

transferred to the receiver for specialized applications. Software support and documentation, for developing

user-defined FIR filter coefficients for use with the 95S-1(A) receiver, may be purchased from Rockwell Collins

or can be developed using standard FIR filter design tools. Two independent demodulators may be operated

simultaneously.

Audio output is generated by twin DACs, using any combination of demodulated signals, routed through

selectable low-pass filters, and applied to headphone, line, and speaker amplifier circuits.

Digital 16-bit I/Q output is also available with user selectable pickoff points in the DSP signal flow.

All parameters and command settings are preserved in nonvolatile memory. This assures that the receiver

operation will be restored whenever power is cycled or a power interruption occurs.

The front panel contains a stereo headphone connector, status indicator lights, and a power switch. Two rear

coaxial input connectors allow RF sources (antennas) to be either independently connected between the receiver

DCR section (2 to 2000 MHz) and the hybrid converter section (0.005 to 30 MHz), or using the RF output (2 to

30 MHz) connected to the hybrid converter section. The two frequency tuning ranges can be multiplexed

internally from a single antenna. The rear 9-pin serial control connector allows for RS-232/RS-422/RS-485

control. Independently adjustable left and right phone channels are available on the headphone connector. The

rear panel audio connector provides access to a variety of audio signals including speaker, line, and phone

outputs.

SONY ICF-SW7600GR

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AOR AR-ONE Specifications Page 33

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